Schedule--Fall Semester 2012-2013
Last updated: November 30, 2012
NOTE:
1. PLEASE CHECK THIS SCHEDULE EACH CLASS DAY FOR UPDATES!
2. PLEASE DO THE DAY'S ASSIGNED READING BEFORE COMING TO CLASS!
Date | Topic & Notes | Reading & Assignment | Lab |
---|---|---|---|
08/27 |
Course introduction: |
Read Peckol Chapter 0; Read this wikipedia page for a "noncommercial" introduction to embedded systems"
Consider completing the Embedded Systems minor
|
Introduction to Lab; Altera software; Student surveys
references: Tasks: 1. complete and hand in the student survey 2. go to this Altera site to download and install Altera software
3. by Sept. 10 complete the following modules in the Digital Logic section of
the Altera University page, http://www.altera.com/education/univ/unv-index.html:
2. laboratory exercises (2): |
08/29 |
HDLs; Verilog--I |
Peckol Appendix A
[optional}: comparison of Verilog
and VHDL by Douglas Smith |
|
08/31 |
Verilog--II |
Note: exam questions may be taken from class notes, class exercises,
homework, lab assignments, or assigned reading |
|
09/03 |
Holiday: Labor Day (United States) |
|
|
09/05 |
Processors (ISA and RTL levels); Instruction cycle; interrupts |
Peckol, chapters 2-3
documents on blackboard: |
|
09/07 |
Processors (continued); |
Reading (optional): paper on function approximation by Hauser and Purdy--on bbd site |
Note: see bbd page for example of a verilog fsm and the associated testbench; ModelSim must be used for testbench simulation
|
09/10 |
Memory; Caching; Dynamic Memory Allocation |
Peckol, chapter 4 and sections 2.4-2.8, 3.8.1, 3.8.3, 3.8.4, 4.20 |
Project design; project 1 assigned, due Monday Sept. 24 in lab:
note on project: the original spec asks you to output BOTH temperature and change.
There are not enough 7-segment digits for this. but either piece of information may
be important. Since you can only output one of these, you also need to output a
signal indicating whether the value represents temperature or change from the last
reading. |
09/12 |
Hardware design considerations: |
|
|
09/14 |
Hardware testing |
Reading [optional]: |
Note 2 on project: there is also a lack of pins for input. You have 10 switches and 3 pushbuttons. The three digits will require 12 switches, since they will be in decimal. So you need to use multiplexing and input the digits in two segments. (you may also want to make it easy to make the time between readings longer so that you can test the board implementation when you get your board).
|
09/17 |
I/O: overview |
Note: Peckol chapters 15-18 contain details for many examples of interfacing
[optional] MS thesis presentation on "serial protocol bridge" by Neena Sharma |
Project I (continued) grading for Morse code example:
project check: |
09/19 |
Architecture options; pipelining |
|
|
09/21 |
Autumnal Equinox (Northern Hemisphere): |
Please note changed schedule for Monday |
What is due in lab on Monday for Project 1: 1. check of your verilog code and simulation results 2. board implementation if you have a board
3. report: BRIEFLY ( 1-2 pages) explain:
|
09/24 |
random number generation; |
Peckol chapters 6 and 7 |
morning lecture material will be presented in lab tonight
project 1 evaluations;
|
09/26 |
software for embedded systems |
|
|
09/28 |
software for embedded systems (continued) |
|
|
10/01 |
software (and hardware) systems design and development |
Peckol chapter 9 |
project 2 continued project 1--"design review": You will be paired with another team. Spend about 20 minutes discussing your designs with one another. Then you team should fill out and hand in this report.
Team Developer Form: If your team is not functioning as well as you
think it should, each team member should fill out a copy of this form; then
the team should meet with Prof. Purdy to discuss the situation
|
10/03 |
UML and extemsions to HW / SW systems |
|
|
10/05 |
UML and extemsions to HW / SW systems (continued) |
|
|
10/08 |
UML and extemsions to HW / SW systems (continued) |
|
project 2 due;
project 1, additional assignment:
Note: additional info on sequence dagrams (conditionals and loops) can be
found HERE |
10/10 |
UML and extemsions to HW / SW systems (continued) |
[optional] Additional information on
specification and modeling for embedded systems can be found in chapter 2 of the book by Marwedel, which is listed on the syllabus page as a reference and which is available as an electronic book from the UC library |
|
10/12 |
review for midterm |
|
|
10/15 |
midterm |
|
NIOS II and QSys (E. Swegert)
Tutorial files
Note: the architecture and assembly language for the Altera NIOS II "soft"
processor can be found at this link. |
10/17 |
HW / SW codesign--adding nontraditional constraints (Indira Jayaram)
|
[optional] tutorial on MARTE (Modeling and Analysis or Real-Time Embedded Systems)
[optional] tutorial on adding nontraditional constraints to an embedded system design, by Indira Jayaram |
|
10/19 |
HW / SW codesign: pqueue example |
Reading: paper by Hoeg et al.--on bbd; |
|
10/22 |
Operating Systems: Components and Duties |
Peckol, chapters 11,12,,13 |
Classical OS problems and MicroC-OS (E. Swegert) |
10/24 |
Processes, threads, and scheduling |
|
|
10/26 |
Process synchronization and deadlocks |
|
|
10/29 |
RTOS--V. Subbian |
|
Project 3 assigned, due 11/19 (E. Swegert) |
10/31 |
Hallowe'en (United States) |
|
|
11/02 |
Embedded Linux (continued)--V. Subbian |
|
|
11/05 |
Optimizing Embedded Code--V. Subbian
|
Peckol, chapter 14 |
work on project 3 |
11/07 |
Security Issues--M. Borowczak |
Reading and assignment: TBD |
|
11/09 |
Security Issues--M. Borowczak (continued) |
|
|
11/12 |
Veterans Day celebrated
|
|
|
11/14 |
Optimization and Profiling--V. Subbian |
Peckol chapter 14
|
|
11/16 |
Debugging Embedded applications--V. Subbian |
|
|
11/19 |
Formal methods for embedded systems--J. Lockhart |
TBD |
Project 3 due
Buffer overflow-tutorial |
11/21 |
Project work day |
|
|
11/23 |
Day after Thanksgiving--Holiday--United States |
|
|
11/26 |
Applications--DSP (P. Deodhar) |
TBD |
Project 4 assigned, due Mon., December 10:
|
11/28 |
Applications--Control (J. Kumpf) |
|
|
11/30 |
Applications--Control (continued) |
|
|
12/03 |
performance analysis and optimation;
NOTE: this lecture will be presented in lab this evening (6-7 p.m.). |
TBD
|
Project 4;
Lecture on performance analysis, optimization, and code compression (6-7 p.m.) |
12/05 |
Safety, reliability, and robust design |
|
|
12/07 |
Final exam / project 4--discussion; |
|
|
12/10 |
Final exam (PAPER COPY PLEASE) due Wednesday December 12 by 6 p.m. |
|
Project 4 report (PAPER COPY PLEASE) due Mon. Dec. 10 by 6 p.m. |