TyVIS: A VHDL Simulation Kernel

NOTICE

These pages refer to the version 1.x series of the SAVANT/TyVIS/warped toolset. Updated web pages for the SAVANT project are available at Clifton Labs. These pages are maintained for historical purposes and relate to the version 1.x series software which can be downloaded here.

Introduction

TyVIS is a VHDL simulation kernel which has been implemented on top of WARPED, a general purpose Time Warp simulation kernel. This combination provides parallel VHDL simulation capability as WARPED allows sequential and parallel simulation. While TyVIS is primarily intended to execute under WARPED, it is not restricted to it. It is the designer's intent to have TyVIS be completely ignorant of the underlying simulation engine, as long as the engine provides TyVIS with the correct procedural interface. TyVIS allows you to simulate and execute VHDL code that has been translated into the TyVIS C++ intermediate form. The VHDL simulator provides the functionality required by a VHDL simulation kernel as specified by the VHDL LRM. The software (version 1.02) is freely available via anonymous ftp (as gzip'ed, tar file). Users may modify, distribute, and use the software contained in the TyVIS distribution under the terms of the "GNU LIBRARY GENERAL PUBLIC LICENSE" version 2, June 1991. TyVIS kernel is funded as part of the SAVANT and QUEST projects.

Note: g++ version 2.8.0/2.8.1 is not recommended if you are planning to download and compile the TyVIS and WARPED simulation kernels. g++ versions 2.8.x have problems compiling templatized classes with arbitrary number of parameters. Here is an example program that you can use to test the compiler.

TyVIS: A VHDL Simulation Kernel

NOTICE

Introduction

TyVIS Software

TyVIS Documentation

Papers

Related Documentation